The Performance Investigation of Junctionless Transistor by Considering Different Recessed Gates

doi:10.1109/EDSSC.2018.8487085

IR > 机电工程学院

	The Performance Investigation of Junctionless Transistor by Considering Different Recessed Gates
	Lou, Haijun 1,2; Li, Wentao2 ; Yang, Yumei1 ; Lin, Xinnan 2
	2018-10-09
会议名称	2018 IEEE International Conference on Electron Devices and Solid State Circuits, EDSSC 2018
会议录名称	2018 IEEE International Conference on Electron Devices and Solid State Circuits, EDSSC 2018
会议日期	June 6, 2018 - June 8, 2018
会议地点	Shenzhen, China
出版者	Institute of Electrical and Electronics Engineers Inc.
摘要	In this paper, the performance of junctionless transistor with three different recessed gates is investigated by numerical simulation. Then the impact of sidewall and the overlapped gate is discussed. The results show that the different recessed gates change the threshold voltage of devices. As compared between the three proposed devices, the gate-over structure has more superior subthreshold characterictics and drain current peformance. The sidewall angle variation in the gate-over devices is also studied. It will offer a helpful guide for fabricating the junctionless transistor with recessed gates. © 2018 IEEE.
关键词	Drain current Threshold voltage junctionless Junctionless transistors Recessed gate sidewall Sidewall angles Subthreshold
DOI	10.1109/EDSSC.2018.8487085
收录类别	EI
语种	英语
EI入藏号	20184606070754
EI主题词	Solid state devices
来源库	Compendex
分类代码	701.1 Electricity: Basic Concepts and Phenomena - 714.2 Semiconductor Devices and Integrated Circuits
引用统计	无
文献类型	会议论文
条目标识符	https://ir.lut.edu.cn/handle/2XXMBERH/118093
专题	机电工程学院理学院
作者单位	1.School of Science, Lanzhou University of Technology, Lanzhou; 730050, China; 2.Shenzhen Key Lab of Advanced Electron Device and Integration, School of Electronic and Computer Engineering, Peking University Shenzhen Graduate School, Shenzhen; 518055, China
第一作者单位	兰州理工大学; 研究生院
推荐引用方式 GB/T 7714	Lou, Haijun,Li, Wentao,Yang, Yumei,et al. The Performance Investigation of Junctionless Transistor by Considering Different Recessed Gates[C]:Institute of Electrical and Electronics Engineers Inc.,2018.